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Power-constrained Testing of Vlsi Circuits: a Guide to the Ieee 1149.4 Test Standard - Frontiers in Electronic Testing Nicolici, Nicola (Mcmaster University, Hamilton, Ontario, Canada) Softcover Reprint of the Original 1st Ed. 2003 edition
Power-constrained Testing of Vlsi Circuits: a Guide to the Ieee 1149.4 Test Standard - Frontiers in Electronic Testing
Nicolici, Nicola (Mcmaster University, Hamilton, Ontario, Canada)
This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.
178 pages, biography
| Media | Books Paperback Book (Book with soft cover and glued back) |
| Released | December 9, 2010 |
| ISBN13 | 9781441953155 |
| Publishers | Springer-Verlag New York Inc. |
| Pages | 178 |
| Dimensions | 155 × 235 × 10 mm · 276 g |
| Language | English |